Analytical model of short-channel gate enclosed transistors using Green functions

TítuloAnalytical model of short-channel gate enclosed transistors using Green functions
AutoresP. López, J. Hauer, B. Blanco-Filgueira, D. Cabello
TipoArtículo de revista
Fonte Solid-state Electronics, PERGAMON-ELSEVIER SCIENCE LTD , Vol. 53, pp. 514-519 , 2009.
RankRanked Q1 in Materials Chemistry by SJR
ISSN0038-1101
DOI10.1016/j.sse.2009.01.018
AbstractEnclosed-layout transistors fabricated in standard CMOS processes are known to offer a natural robustness against radiation effects, a characteristic which is boosted in submicron technologies due to the reduction of the oxide thickness. In this paper, a thorough analytical I–V model of short-channel polygonal enclosed-layout transistors is proposed, addressing the issues of drain-induced barrier lowering and threshold voltage roll-off due to short-channel effects. Experimental data is reported, showing good agreement with the theoretical model.
Palabras chaveRad-hard transistors, short-channel effects, DIBL, device modeling

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