PRECISION: A reconfigurable SIMD/MIMD coprocessor for Computer Vision Systems-on-Chip

TítuloPRECISION: A reconfigurable SIMD/MIMD coprocessor for Computer Vision Systems-on-Chip
AutoresA. Nieto, D.L. Vilariño, V.M. Brea
TipoArtículo de revista
Fonte IEEE Transactions on Computers, IEEE COMPUTER SOC , Vol. 65, No. 8, pp. 2548-2561 , 2016.
RankRanked Q1 in Hardware and Architecture by SJR
ISSN0018-9340
DOI10.1109/TC.2015.2493527
AbstractComputer vision applications have a large disparity in operations, data representation and memory access patterns from the early vision stages to the final classification and recognition stages. A hardware system for computer vision has to provide high flexibility without compromising performance, exploiting massively spatial-parallel operations but also keeping a high throughput on data-dependent and complex program flows. Furthermore, the architecture must be modular, scalable and easy to adapt to the needs of different applications. Keeping this in mind, a hybrid SIMD/MIMD architecture for embedded computer vision is proposed. It consists of a coprocessor designed to provide fast and flexible computation of demanding image processing tasks of vision applications. A 32-bit 128-unit device was prototyped on a Virtex-6 FPGA which delivers a peak performance of 19.6 GOP/s and 7.2 W of power dissipation.
Palabras chaveFPGA, reconfigurable hardware, embedded computer vision, parallel processors