PhD defense: 'Parallelization and Optimization of Iterative Solvers on High Performance Architectures'
The main objective of this thesis is to develop an optimal sparse matrix storage format and implement efficient computing kernels that accelerate the execution of the sparse matrix vector (SpMV) product on modern computer architectures.
The SpMV product is an essential building brick for a myriad of numerical application codes, especially for iterative solvers and numerical simulators. Improving the performance of the SpMV product is of special interest for researchers, because it is the major bottleneck for codes where it is required. Optimizing this product on modern computer architectures requires knowledge of parallel programing paradigms, efficient parallel algorithms and a basic idea of the device architecture being targeted.
This thesis has the European mention, and it also has produced a paper published on a Q1 Journal according to the JCR ranking of its respective area of specialization.
Supervisor: Antonio García Loureiro