HSCAP: Hardware and software for high performance computing

Since the Finisterrae supercomputer has been put on production at the Supercomputing Center of Galicia (CESGA) new challenges arise and we deal with new objectives oriented to improve some aspects of the high performance computing systems.

Finisterrae is a large constellation architecture composed of 142 shared memory nodes with 16 cores of Itanium processors plus other three ccNUMA nodes with 64, 64 and 128 cores (i.e, more than 2500 processors and 19.000 GB of memory). Moreover, the new and recent parallel architectures for computer graphics, as the new NVIDIA GPUs, makes possible the development and implementation of new and more complex algorithms, both in the computer graphics area and in the general purpose computing area, and the development of hybrid CPU-GPU many-and multicore architectures.

Finally, improving the functional units of the processors contributes as well to improve the performance of the parallel systems.

Objectives

  • Performance improvement on many- and multicore architectures: modelling of the memory hierarchy of new hybrid CPU-GPU multicore architectures; adaptation of the performance tools to the hybrid multi-core CPU/GPU architecture; and optimization of different memory hierarchy performance problems among others.
  • Computer graphics and multimedia: improve and extend our hybrid algorithm for interactive visualization of digital terrain models to have a complete multiresolution rendering method of hybrid models; develop efficient design techniques for the implementation of video encoding tasks on highly parallel architectures such as Massively Parallel Processor Arrays and FPGAs.
  • Functional units design and computer arithmetic: improvement of the floating-point rounding error hardware estimator and proposal of new and more accurate estimators based on an improved representation of interval arithmetic; and development of new algorithms and architectures for decimal floating-point and binary floating-point among others.