Design methodology of a 0.7 V, 64.5 pW @ 36°C, 1830 μm² Subthreshold Voltage Reference for Implantable Devices

TítuloDesign methodology of a 0.7 V, 64.5 pW @ 36°C, 1830 μm² Subthreshold Voltage Reference for Implantable Devices
AutoresÓscar Pereira-Rial, Juan M. Carrillo, P. López, V.M. Brea, D. Cabello
TipoComunicación para congreso
Fonte 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Génova (Italia), 2020.
DOI10.1109/ICECS46596.2019.8964763
AbstractA picowatt CMOS voltage reference for body implantable devices is presented in this paper. The circuit is based on a PMOS-only voltage reference core with a passive RC filter to enhance the supply noise rejection and a speed-up mechanism to improve the switching-on time of the circuit. The measured power consumption at a supply voltage of 0.7 V is as low as 64.5 pW at the reference human body temperature of 36 °C, with a PSR better than -60 dB until frequencies of MHz.
Palabras chavevoltage reference, ultra-low power, picowatt, CMOS