Parallelization and Optimization of Iterative Solvers On High Performance Architectures

TítuloParallelization and Optimization of Iterative Solvers On High Performance Architectures
Autor/aEdoardo Emilio Coronado Barrientos
DirectoresAntonio García Loureiro
TipoTese doutoral
Data de lectura2021-11-24
Lugar de lecturaCiTIUS
Doutorado Doutorado europeo
AbstractThe main objective of this thesis is to develop an optimal sparse matrix storage format and implement efficient computing kernels that accelerate the execution of the sparse matrix vector (SpMV) product on modern computer architectures. The SpMV product is an essential building brick for a myriad of numerical application codes, especially for iterative solvers and numerical simulators. Improving the performance of the SpMV product is of special interest for researchers, because it is the major bottleneck for codes where it is required. Optimizing this product on modern computer architectures requires knowledge of parallel programing paradigms, efficient parallel algorithms and a basic idea of the device architecture being targeted.